This is the link to our Chipathon 2025 git repo: https://github.com/codearpit07/SSCS-Chipathon-2025_SiliconB. Brief Description of the project: Designing standard ...
Abstract: We report on four-input NAND and NOR gates using only two 7nm Schottky-Barrier (SB) independent-gate FinFETs transistors that take advantage of gate workfunction engineering (WFE). Careful ...
Laboratory for Nanomaterials and Molecular Plasmonics, Department of Chemistry and Biology, Ryerson University, Toronto, ON, Canada Molecules that respond to input stimulations to produce detectable ...
This paper introduces a novel standard-cell flash architecture for implementing analog-to-digital converters (ADC). The proposed ADC consists of several CMOS inverters all having their inputs ...
A collection of fundamental digital logic circuits implemented in VHDL and tested on FPGA hardware. Each design includes the VHDL source code, testbenches for ...
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